1. Field of the Invention
The present invention relates to an OFDM (Orthogonal Frequency Division Multiplexing) reception apparatus, and more particularly, to an OPDM reception apparatus in a mobile communication and a symbol synchronization error reduction method therefor.
2. Description of the Related Art
A conventional OFDM reception apparatus is explained below using FIG. 1 to FIG. 4. FIG. 1 is a schematic block diagram illustrating a part of a configuration of the conventional OFDM reception apparatus. FIG. 2 is a schematic block diagram illustrating a part of another configuration of the conventional OFDM reception apparatus. FIG. 3 is a schematic diagram illustrating a frame structure of a transmission signal in an OFDM system. FIG. 4 is a schematic diagram illustrating a correlation value calculation result in the OFDM reception apparatus.
The configuration of the conventional OFDM reception apparatus and an acquisition method for symbol synchronization timing therein are explained first using FIG. 1.
In FIG. 1, A/D converter 1 converts a received signal from an analog signal to a digital signal. Delayer 2 delays the received signal which is converted into the digital signal (hereinafter, also referred to as received digital signal) by one symbol. Multiplier 3 executes complex multiplication processing between the received digital signal and the received signal delayed by one symbol in delayer 2 (hereinafter, also referred to as one-symbol-delayed received signal).
Integrator 4 integrates outputs from multiplier 3. Subtracter 5 processes the subtraction between an output from integrator 4 and a threshold level. Decider 6 decides whether an output from subtracter 5 is positive or negative. For example, in the case where such an output is positive, it is determined that the integrated result exceeds the threshold level, and the timing having such an integrated result is used as a processing timing for FFT which is descried below.
FFT circuit 7 executes fast Fourier transform (FFT) processing on the received digital signal. The FFT processing in FFT circuit 7 is initiated based on an output from decider 6, i.e., the processing initiation timing.
Demodulator 8 executes demodulation processing on an output signal from FFT circuit 7. Decider 9 executes a decision on an output signal from demodulator 8.
Operations in the OFDM reception apparatus with the configuration as described above are next explained. The received signal generally has a frame structure as illustrated in FIG. 3. In such a e frame structure, guard interval 42, with the same signal as the end portion of effective symbols, is provided before effective symbol 41 for the purpose of canceling a delayed version, and phase reference symbol (pilot symbol) 43 and synchronization symbol 44, which is the same signal as phase reference symbol 43, are provided at the head of signals (before the guard interval).
The received signal, which is converted into the digital signal in A/D converter 1, is delayed by one symbol in delayer 2. Multiplier 3 obtains the correlation value of the received signal with the one-symbol-delayed received signal.
Since the same signal as phase reference symbol 43 is provided as synchronization symbol 44 before phase reference symbol 43, as illustrated in FIG. 4, the correlation value calculated in multiplier 3 has the peak at a position which is the end portion of the phase reference symbol of the received signal and the end portion of the synchronization symbol of the one-symbol-delayed signal (head of phase reference symbol 43). Therefore, by the use of subtracter 5 and decider 6, it is possible to detect the peak of the correlation value by comparing the output from integrator 4 to the threshold level.
The symbol synchronization timing, which is an output from decider 6, is input to FFT circuit 7 as a FFT processing initiation trigger.
The received signal subjected to the FFT processing in FFT circuit 7 is output to demodulator 8 to be demodulated therein, and then decided in decider 9 to be a demodulated signal.
The case where the diversity is performed on received signals from a plurality of branches is next described using FIG. 2.
In FIG. 2, A/D converters 11 and 12 respectively convert received signal 1 from branch 1 and received signal 2 from branch 2 each from the analog signal to the digital signal. Delayers 13 and 14 respectively delay received digital signals 1 and 2 each by one symbol. Multipliers 15 and 16 execute complex multiplication processing between received digital signals 1 and 2, and received signals 1 and 2 which are delayed by one symbol in delayers 403 and 404, respectively.
Integrators 17 and 18 integrate respective outputs from multipliers 15 and 16. Subtracters 17 and 18 execute subtraction processing between respective outputs from integrators 17 and 18 and a threshold level. Deciders 21 and 22 decide whether respective outputs from subtracters 19 and 20 are positive or negative. For example, in the case where such an output is positive, it is determined that the integrated result exceeds the threshold level, and the timing having such an integrated result is used as a processing timing for FFT which is descried below.
FFT circuits 23 and 24 execute respectively fast Fourier transform (FFT) processing on received digital signals 1 and 2. The FFT processing in FFT circuits 23 and 24 is initiated based on respective outputs from deciders 21 and 22, i.e., the processing initiation timing.
Selector 25 selects an output from FFT circuit 23 or 24 to output corresponding to received levels of received signals 1 and 2. Demodulator 26 demodulates an output signal from selector 25. Decider 27 executes a =decision on an output signal from demodulator 26.
Arc tangent calculators 28 and 29 execute arc tangent calculation on respective output signals from integrators 17 and 18. Averager 30 averages outputs from arc tangent calculators 28 and 29.
Operations in the OFDM reception apparatus with the configuration as described above are next explained.
Received signals 1 and 2 received in branches 1 and 2 are converted into digital signals in A/D converters 11 and 12, and then are delayed each by one symbol in delayers 13 and 14, respectively. Multipliers 15 and 16 obtain the correlation values of the respective received signals with the respective one-symbol-delayed received signals.
With respect to the correlation values calculated for the received signals in respective branches, by the use of subtracters 19 and 20, and deciders 21 and 22, respectively, the peaks are detected by comparing respective outputs from multipliers 17 and 18 to a threshold level.
The symbol synchronization timings, which are the outputs from deciders 21 and 22, are input to FFT circuits 23 and 24, respectively, each as a FFT processing initiation trigger.
With respect to received signals 1 and 2 subjected to the FFT processing in FFT circuits 23 and 24, selector 25 selects either of received signal 1 or 2, of which the received level is higher than the other, to output to demodulator 26. The received signal, which is selected in selector 25 and input to demodulator 26, is demodulated in demodulator 26, and then decided in decider 27 to be a demodulated signal.
On the other hand, output signals from integrators 17 and 18 are subjected to arc tangent calculation respectively in arc tangent calculators 28 and 29, so as to calculate respective phase rotation amounts of received signals in respective branches. Averager 30 averages the respective phase rotation amounts of received signals in respective branches to output. Phase rotation amount xcex94f, which is an output from averager 30, is used as a frequency offset amount to be compensated in the frequency offset compensation in the quasi-coherent detection.
As descried above, the conventional OFDM reception apparatus calculates the correlation value of the received signal with the one-symbol-delayed received signal, detects the peak of the correlation value, and obtains the timing, at which the peak is detected, as the symbol synchronization timing, which is used as the timing for FFT processing initiation for the received signal. Further, in the diversity, the branch with the highest received level is selected.
However, in the conventional OFDM reception apparatus, there is a problem that error rate characteristics deteriorate greatly under multipath environments where the symbol synchronization timing tends to be acquired behind an actual timing.
In other words, in the conventional OFDM reception apparatus, since the guard interval is proved before the effective symbols, the effective symbols are extracted without any problems in the case where the symbol synchronization timing is acquired faster than the actual timing. However, in the case where the synchronization is acquired at a timing slower than the actual timing, interference occurs and the error rate characteristics deteriorate greatly.
An object of the present invention is to provide an OFDM reception apparatus which improves the accuracy for the symbol synchronization acquisition, and further improves the error rate under multipath environments.
A gist of the present invention is to use the peak detected timing for a frame of which the peak of the correlation value is detected fastest among a plurality of frames received during a predetermined time, as the symbol synchronization timing which is the timing for FFT processing initiation, and in the diversity, to use the peak detected timing for a received signal in a branch of which the peak of the correlation value is detected fastest among all received signals, as the symbol synchronization timing which is the timing for FFT processing initiation common to received signals in all branches.